The instant invention relates to switches for semiconductors, and more precisely to triacs, but in certain cases it can also apply to thyristors.
It is reminded that a triac is constituted by two reverse connected thyristors arranged side by side on a same semiconductive chip. Each thyristor is constituted by the superimposition of four semiconductive layers of alternative conductivity types, NPNP, which are respectively a P-type anode layer, a N-type central layer common to two thyristors, a P-type gate layer, and a N-type emitter layer. On the back face of the chip, a first main metallization overlays both the anode layer of one of the thyristors and the emitter layer of the other thyristor; on the front face, a second main metallization overlays both the emitter layer of the first thyristor and the anode layer of the other thyristor while a gate metallization overlays a portion of the gate layer of the first thyristor where this layer is apparent.
This arrangement corresponds generally to the structure of any triac, and the front face and back face of a conventional triac are shown in FIGS. 1 and 2, respectively. More precisely, one sees on those figures the surface portions of the various layers of the N- and P-type on the front and back faces. The cross-hatched areas show the surface of the N-type layers; the white areas show the surface of the P-type layers. The solid lines delimit the separation of those areas; the dotted lines show the outline of the metallizations which contact with the semiconductor surface portions.
In FIG. 1 (front face), reference 10 designates the surface of the emitter layer of the first thyristor; reference 12 designates the surface of the anode layer of the second thyristor; reference 14 designates a surface portion of the gate layer of the first thyristor; reference 16 designates a portion of the N-type not overlaid by the first main metallization but overlaid by a gate metallization.
The outline of the first main metallization is representation by the dotted line 18; this line surrounds the greater part of the region 10 and the greater part of the region 12.
The outline of the gate metallization is represented by the dotted line 20. It includes the region 14 and a portion of the region 16.
As it is apparent from the drawings, the front face of the triac is generally divided into two main areas separated by a diagonal of the rectangle or the square constituting this front face; the first area essentially includes the emitter region 10 and the first thyristor is located perpendicularly to this region; the second are essentially includes the anode region 12 and the second thyristor is located perpendicularly to this region. The same general partition exists on the back face. The boundary area between the two thyristors is a critical area for the good switching operation of the triac.
On the back face of the triac, shown in FIG. 2, one essentially finds a P-type region 22 which is part of the anode layer of the first thyristor, and a N-type region 24 which is part of the emitter layer of the second thyristor; those two regions are essentially separated by a diagonal which corresponds to the diagonal mentioned in FIG. 1. Regions 22 and 24 of the back face are overlaid by the second main metallization, the outline of which is represented by the dotted line 26.
To end the description of the very conventional triac shown in FIGS. 1 and 2, it will be noted that the emitter shorting holes 28, which are small P-type regions crossing the emitter layer towards the main metallization from the gate layer, generally both on the back face and on the front face. The function of those holes is, on the one hand, to improve the triggering of the triac when a gate current is present, and on the other hand, to facilitate the turn off of the triac while permitting to extract the charges stored during the triac conduction phase.
One of the objects of the invention is to provide for an arrangement of the shorting holes which optimizes the triggering and blocking features of triacs.